The term “network on chip” (NoC) refers to distributed connectivity of computing and other resources that are configured as an on-chip computer network. At sub-32-nanometer dimensions, increased electrical noise and cross-talk reduces the effectiveness of traditional on-chip bus structures. Complex system-on-chip (SoC) devices will require a network-like structure with an error correction protocol. The most likely topology will be a globally asynchronous locally synchronous (GALS) structure.
Network on Chip (NoC)
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